1. Field of the Invention
The present invention relates to an improved semiconductor device and method for increasing semiconductor device density. In particular, the present invention relates to a device and method utilizing leads over and under processes such that two superimposed semiconductor dice can be attached to a single lead frame.
2. Background Art
High performance, low cost, increased miniaturization of components, and greater packaging density of integrated circuits have long been the goals of the computer industry. Greater integrated circuit package density, for a given level of component and internal conductor density, is primarily limited by the space available for die mounting and packaging. For lead frame mounted dies, this limitation is a result of conventional lead frame design. Conventional lead frame design inherently limits potential single-die package density because the die-attach paddle of the lead frame must be as large 25 or larger than the die securing it. The larger the die, the less space (relative to size of the die) that remains around the periphery of the die-attach paddle for bond pads for wire bonding. Furthermore, the inner lead ends on a lead frame provide anchor points for the leads when the leads and the die are encapsulated in plastic. The anchor points may be emphasized as lateral flanges or bends or kinks in the lead. Therefore, as the die size is increased in relation to the package size, there is a corresponding reduction in the space along the sides of the package for the encapsulating plastic which joins the top and bottom portions of the molded plastic body at the mold part line and anchors to the leads. As the leads are subjected to the normal stresses of forming and assembly operations, the encapsulating plastic may crack, which may destroy the package seal and substantially increase the probability of premature device failure.
One method of increasing integrated circuit density is to stack dice vertically. U.S. Pat. No. 5,012,323 ("the '323 patent") issued Apr. 30, 1991 to Farnworth teaches combining a pair of dice mounted on opposing sides of a lead frame. An upper die is back-bonded to the upper surface of the leads of the lead frame via a first adhesively coated, insulated film layer. The lower die is face-bonded to the lower lead frame die-bonding region via a second, adhesively coated, insulative, film layer. The wirebonding pads on both the upper die and lower die are interconnected with the ends of their associated lead extensions with gold or aluminum wires. The lower die needs to be slightly larger than the upper die in order that the lower die bonding pads are accessible from above through an aperture in the lead frame such that gold wire connections can be made to the lead extensions. However, this arrangement has a major disadvantage from a production standpoint, since the different size dice require that different equipment produce the different dice or that the same equipment be switched over in different production runs to produce the different dice. Moreover, the lead frame design employed by Farnworth employs long conductor runs between the die and the exterior of the package, and the lead frame configuration is specialized and rather complex.
U.S. Pat. No. 5,291,061 issued Mar. 1, 1994 to Ball teaches a multiple stacked die device that contains up to four dies which does not exceed the height of current single die packages. The low profile of the device is achieved by close-tolerance stacking which is made possible by a low-loop-profile wirebonding operation and thin-adhesive layers between the stack dies. However, Ball secures all of the dice to the same (upper) side of the lead frame, necessarily increasing bond wire length, even if some of the leads are bent upwardly. Moreover, Ball employs a die paddle to support the die stack, a technique which requires an extra die-attach step, and which increases the distance between the inner lead ends and even the lowermost die in the stack, resulting in longer bond wires.
U.S. Pat. No. 4,862,245 issued Aug. 29, 1989 to Pashby discloses a "leads over chip" (LOC) configuration, wherein the inner lead ends of a standard dual-in-line package (DIP) lead frame configuration extend over and are secured to the upper (active) surface of the die through a dielectric layer. The bond wire length is thus shortened by placing the inner lead ends in closer proximity to a central row of die bond pads, and the lead dimensions purportedly enhance heat transfer from the die. However, the Pashby LOC configuration as disclosed relates to mounting and bonding only a single die.
Therefore, it would be advantageous to develop a technique and device for increasing integrated circuit density using substantially similar or identically sized dies with non-complex lead frame configurations, provide short bond wire lengths and achieve a lower profile than state-of-the-art designs, which configuration is readily susceptible to plastic packaging techniques, such as transfer molding.